1. Field of the Invention
The present invention relates to a multilayer capacitor and, more particularly, to a multilayer capacitor which can be advantageously used in high frequency circuits.
2. Description of the Related Art
FIG. 7 shows a schematic sectional view of a typical prior art multilayer capacitor 1 which includes a main body 5 having a plurality of ceramic dielectric material layers 2 stacked one on top of the other. A set of first internal electrodes 3 and a set of second internal electrodes 4 are arranged alternately, with a respective dielectric material layer 2 located between adjacent pairs of electrodes 3 and 4 to form a plurality of capacitor units.
Each of the first internal electrodes 3 is electrically coupled to a first external terminal electrode 8 formed on a first end face 6 of the main body 5. Each of the second internal electrodes 4 is electrically coupled to a second external electrode 9 formed on a second end surface 7 of main body 5. As a result, the electrostatic capacities respectively provided by the plurality of capacitor units are connected in parallel by the first and second external terminal electrodes 8 and 9.
The multilayer capacitor 1 shown in FIG. 7 exhibits a problem which is discussed below.
FIG. 9 is a schematic sectional plan view showing one of the electrodes 3 of FIG. 7. In this figure, arrows indicate the path and direction of typical currents 22 which flow in each of the first internal electrodes 3 of the multilayer capacitor 1. In the state shown (the directions of the currents alternate over time when an AC signal is applied to the capacitor), the currents 22 flow from the second external electrode 9 to the second internal electrodes 4 (not shown in FIG. 9), vertically to the first internal electrodes 3 through the dielectric material layers 2 and then to the first external terminal electrode 8 through the first internal electrodes 3. There is a general flow of currents in both internal electrodes 3 and 4 from right to left, i.e., in the same direction, as seen in FIG. 9.
As is well known, the current 22 induces a magnetic flux in a direction determined by the direction of the current 22, thereby producing a self-inductance component. Since the currents 22 flow in the longitudinal direction of the internal electrodes 3, the multilayer capacitor 1 produces relatively high equivalent series inductance (ESL) and may fail to function properly in a high frequency band when it is used as a decoupling capacitor or bypass capacitor.
This problem is partly overcome using the structure shown schematically in FIG. 8. This structure is described in Japanese unexamined patent publication No. H7-201651.
Like the multilayer capacitor 1 shown in FIG. 7, the multilayer capacitor 11 includes a main body 15 having a plurality of dielectric material layers 12 stacked one on top of the other. A plurality of first internal electrodes 13 and a plurality of second internal electrodes 14 are arranged on respective dielectric material layers 12 to form pairs of overlapping electrodes, each pair of overlapping electrodes being separated by a respective dielectric material layer 12 such that a plurality of capacitor units are formed.
In this multilayer capacitor 11, first and second external terminal electrodes 18 and 19 are formed, respectively, on first and second principal surfaces 16 and 17 extending in parallel with the internal electrodes 13 and 14.
A plurality of first connection portions 20, which are electrically isolated from second internal electrodes 14, are provided to electrically connect the first internal electrodes 13 to both the first external terminal electrode 18 and to each other.
A plurality of second connection portions 21, which are electrically isolated from first internal electrodes 13, are provided to electrically connect the second internal electrodes 14 to both the second external terminal electrode 19 and each other.
Thus, the electrostatic capacities provided by the plurality of the capacitor units formed by the respective pairs of internal electrodes 13 and 14 are coupled in parallel by the connection portions 20 and 21 and are combined at external terminal electrodes 18 and 19, respectively.
Compared to the prior art capacitor of FIG. 7, the multilayer capacitor 11 shown in FIG. 8 reduces the equivalent series inductance (ESL) and is suitable for use in a high frequency band.
In FIG. 10, the arrows indicate the path and direction of typical currents 23 which flow in, for example, the first internal electrodes 13 of the multilayer capacitor 11. In the state shown (the directions of the currents alternate over time when an AC signal is applied to the capacitor), the currents 23 flow from the second internal electrodes 14 (not shown in FIG. 10) in a face-to-face relationship with the first internal electrodes 13 to the first internal electrodes 13 through the second connection portions 21. Then, most of the currents flow to the nearest first connection portion 20 and further to the first external terminal electrode 18 through the first connection portion 20.
When such a flow of the currents 23 is viewed with attention to the area around the connection portions 20 or 21, since the currents 23 flow in various directions, components of magnetic flux produced by the currents 23 are advantageously canceled by each other to suppress the generation of net magnetic flux. Further, since the lengths of the paths of the currents 23 flowing through the internal electrodes 13 or 14 are limited to the intervals between adjacent connection portions 20 and 21, the lengths of each of the current paths is relatively short and, therefore, the self-inductance components produced are reduced.
However, the reduction of the ESL in the multilayer capacitor 11 is achieved only for components of magnetic flux induced by the currents 23 in the direction in which the internal electrodes 13 and 14 extend. FIG. 11 is an enlarged view of a part of the multilayer capacitor 11 shown in FIG. 8, in which currents 24 and 25 flowing respectively through the connection portions 20 and 21 of the multilayer capacitor 11 are indicated by the dashed arrows.
Referring to FIG. 11, when currents flow, for example, from the second external terminal electrode 19 to the first external terminal electrode 18, upwardly directed currents 24, 25 flow through both the first connection portions 20 and through the second connection portions 21, respectively.
The currents 24 flowing through the first connection portion 20 and the currents 25 flowing through the second connection portion 21 produce respective components of magnetic flux 26 and 27, as shown in FIG. 12. The currents flowing through the respective connection portions 20 and 21 flow from the back side to the front side of the plane of FIG. 12 (i.e., they flow out of the page). The direction of the resultant components of magnetic flux 26 and 27 oppose one another in the areas between the connection portions 20 and 21. As a result, the magnetic flux is canceled between the connection portions 20 and 21.
The magnetic flux 28 that surrounds the components of magnetic flux 26 and 27, however, is not canceled.
Rather, the magnetic flux 28 tends to be greater than each individual magnetic flux 26, 27 and, therefore, increases the ESL.
As a result, the components of magnetic flux 26 and 27 produced by the currents 24 and 25 flowing through the connection portions 20 and 21 are not effectively canceled and increase the self-inductance of the capacitor 11. Thus, the ESL is not sufficiently reduced and high frequency performance is not sufficiently improved.
In order to solve the above-described technical problems, a multilayer capacitor according to the present invention comprises a capacitor body; m pair of first and second generally planar internal electrodes located in said capacitor body, each said pair of internal electrodes being separated by a respective dielectric layer to define a respective capacitive unit, m being a positive integer greater than or equal to one. The multilayer capacitor also comprises n first external electrodes located on a first surface of said capacitor body, n being an integer greater than or equal to 1; p second external electrodes located on said first surface of said capacitor body, p being an integer greater than or equal to 1; n first connection portions operable to electrically connect said first internal electrodes to each other and to a respective one of said first external electrodes, each of said first connection portions being electrically insulated from said second internal electrodes; and p second connection portions operable to electrically connect said second internal electrodes to each other and to a respective one of said second external electrodes, each of said second connection portions being electrically insulated from said first internal electrodes.
According to the invention, the first and second connection portions are arranged such that they are not more than about 2 mm from each other. Preferably, they are not positioned more than about 1 mm apart. In other words, the interval between the first and second connection portions is preferably as small as possible.
Further, according to the invention, it is preferable that a plurality of first and second connection portions are provided.
In the preferred embodiment of the invention described above, the plurality of first connection portions and the plurality of second connection portions are more preferably arranged such that the connection portions nearest to each of the first connection portion are second connection portions.
More preferably, the plurality of first connection portions and the plurality of second connection portions are alternately arranged.
Further, the first and second internal electrodes are preferably disposed in a substantially square configuration and are rounded in the areas of the four corners of the square. Still further, each of the first and second connection portions preferably has a substantially round configuration, and the roundness at the corners of the first and second internal electrodes is provided as an arc which is substantially concentric with the sectional configuration of the first or second connection portions which are nearest to the relevant corners.
Moreover, according to the invention, the first and second external terminal electrodes are preferably in a substantially point-like configuration.
In a preferred embodiment of the invention, a plurality of first and second internal electrodes are provided such that they are alternately arranged in the stacking direction of the dielectric material layers; the first connection portion further extends through the second internal electrodes to electrically connect the plurality of first internal electrodes to each other; and the second connection portion further extends through the first internal electrodes to electrically connect the plurality of second internal electrodes to each other.